VLSI / ASIC Design Execution
Bhargav Shrivathsa
I work on VLSI and ASIC design execution with a focus on workflow optimization and automation. My interests center on building reliable systems, accelerating iteration, and modernizing complex interdependent engineering workflows into a dependable, well-oiled execution machine.
Design Automation
Execution Workflows
Parallel Compute Optimization
Hardware-Software Integration
LinkedIn is the preferred method of contact.
What I Do
I identify organizational bottlenecks in deeply-coupled engineering processes, and systematically implement workflow standardization and automation to measurably improve efficiency.
- Introduced robust, scalable build automation into core chip-design processes.
- Optimized and built workflow orchestration systems to reduce engineering errors and improve determinism.
- Created organization-wide systems used by thousands of engineers to standardize data handoffs at full-chip scale.
- Carefully selected and hired world-class engineering talent, retaining them through high-autonomy, large-scope problems.